CLINT: Difference between revisions
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(VERY basic description of it, as well as a memory map as specified by the following link, update HIGHLY recommended https://sifive.cdn.prismic.io/sifive/ad5577a0-9a00-45c9-a5d0-424a3d586060_u74_core_complex_manual_21G3.pdf) |
(No difference)
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Latest revision as of 03:15, 16 February 2023
The CLINT(Core-Local Interruptor) is a device made for handling interrupts occurring within a core, such as software interrupts. The CLINT operates on individual cores, meaning there is 1 for each core.
SiFive U74 CLINT
Memory layout:
base + 0x0000: MSIP, used for generating machine level interrupts
base + 0x0004: Reserved
...
base + 0x3FFF: Reserved
base + 0x4000: MTIMECMP, not sure
base + 0x4008: Reserved
...
base + 0xBFF7: Reserved
base + 0xBFF8: mtime, Timer register
base + 0xC000: Reserved